In the semiconductor industry, the minimum feature sizes of microelectronic devices are well into the deep sub-micron regime to meet the demand for faster, and lower power semiconductor devices. The downscaling of complimentary metal-oxide-semiconductor (CMOS) devices imposes scaling constraints on the gate dielectric material. The thickness of the conventional SiO2 gate dielectric is approaching its physical limits. The most advanced devices are using nitrided SiO2 gate dielectrics approaching an equivalent oxide thickness (EOT) of about 1 nanometer (nm) or less where the leakage current density can be as much as 1 mA/cm2. To improve device reliability and reduce electrical leakage from the gate dielectric to the transistor channel during operation of the device, semiconductor transistor technology is implementing the use of high-k gate dielectric materials that allow increased physical thickness of the gate dielectric layer while maintaining a low EOT. EOT is defined as the thickness of SiO2 that would produce the same capacitance voltage curve as that obtained from an alternate dielectric material. High-k materials are dielectric materials featuring a dielectric constant greater than that of SiO2 (k˜3.9). High-k materials may refer to dielectric materials that are deposited onto substrates rather than grown on the surface of the substrate, as is the case for SiO2. High-k materials may, for example, include a metal oxide film or a metal silicate film.
Several methods have been developed for forming thin high-k dielectric films that may be used in semiconductor devices. Among the more established techniques are Chemical Vapor Deposition (CVD) and Atomic Layer Deposition (ALD), but these deposition techniques each have advantages and disadvantages that are problematic for high-volume semiconductor manufacturing. In addition to the need to reduce substrate (wafer) contamination, there is further a need to achieve good uniformity in batch processing, with respect to zone-to-zone uniformity, wafer-to-wafer uniformity and overall film uniformity. In addition to the need for good film uniformity, there is also a need to improve the electrical properties of the high-k dielectric film, including the amount of hysteresis in the film, the density of defects at interfaces of the high-k dielectric film with other materials, and the leakage current, while maintaining a high effective k value for the film stack and a low EOT.